This application is based upon and claims the benefit of the priority of the prior French patent application 97-09164 filed on Jul. 18, 1997, the contents of which are incorporated herein.
1. Field of the Invention
The invention relates generally to capacitors and more particularly to metal-metal capacitors produced within an integrated circuit, and their fabrication process.
2. Description of the Related Art
Among the various types of capacitors which may appear within an integrated circuit produced on a semiconductor chip, for example a silicon chip, mention may be made of so-called xe2x80x9cpolysilicon-siliconxe2x80x9d capacitors or xe2x80x9cpolysilicon-polysiliconxe2x80x9d capacitors or else xe2x80x9cmetal-metalxe2x80x9d capacitors, depending on the composition of their electrodes.
So-called xe2x80x9cmetal-metalxe2x80x9d capacitors, i.e. capacitors whose two electrodes are made of metal, offer the advantage of having a very small variation in the capacitance as a function of the voltage which is applied to them, and of furthermore having a very low parasitic resistive component. For all these reasons, metal-metal capacitors are advantageously used in radiofrequency applications.
An integrated circuit generally comprises electronic components, for example transistors, produced within a semiconductor substrate, as well as various levels of metallization which in particular allow a formation of interconnection tracks between the various components of the integrated circuit. Each level of metallization then generally comprises, after etching a metal layer, several interconnection tracks lying at this same level, all these tracks being sandwiched between two insulating layers. The level of metallization immediately above is then produced on the upper insulating layer covering the lower level of metallization. The interconnection between tracks lying at two adjacent levels of metallization is formed by interconnection holes filled with a filling metal, for example tungsten, and referred to by those skilled in the art as vias. Moreover, an intermetal diffusion barrier is produced at the aluminium-tungsten interface by depositing a protective layer generally made of titanium nitride or of titanium.
The conventional thickness of an insulating layer separating two adjacent levels of metallization is generally about 1 micron. It is therefore not possible to produce a metal-metal capacitor directly between two track portions lying at two different levels of metallization separated by such a thickness. This is because the thickness of the dielectric layer of a metal-metal capacitor must typically be about 200 xc3x85.
Thus, a known process for fabricating a metal-metal capacitor within an integrated circuit consists in depositing, on the lower insulating layer for supporting a level of metallization, covered with a protective layer, for example made of titanium nitride, a layer of aluminium forming a level of metallization (this protective layer resulting from the presence at another point in the integrated circuit of a via connecting this level of metallization to a lower level of metallization or to a component produced in the substrate). Next, this layer of aluminium is etched so as to define, for instance, the first electrode of the capacitor and then the upper insulating layer is deposited on this first electrode and on all the interconnection tracks of the level of metallization, this upper insulating layer covering this level of metallization and being intended to support the level of metallization immediately above. An aperture is then etched in this upper insulating layer down to above the first electrode of the capacitor and then a thin layer of a dielectric, for example generally silicon dioxide or possibly silicon nitride, is deposited to a thickness of approximately 50 to 300 xc3x85. Another protective layer is then deposited on this dielectric layer, allowing contact between this level of metallization and another via at another point in the integrated circuit. The said aperture is then filled with the filling metal, typically tungsten, by deposition and then planarization. After having deposited an intermetal diffusion barrier on the tungsten, the metal layer (aluminium) of the level of metallization immediately above is deposited, which layer is etched so as to form the interconnection tracks of this level of metallization, and the second electrode of the metal-metal capacitor is deposited.
Such a process has drawbacks.
This is because it does not allow precise control of the thickness of the dielectric of the capacitor thus produced, in particular when this dielectric is composed of silicon dioxide, since the TiN protective layer attacks the dielectric of the capacitor. Furthermore, in general this process only allows the production of planar metal-metal capacitors. Moreover, the capacitor thus produced extends over two levels of metallization of the integrated circuit.
The invention is intended to provide a solution to these problems.
Briefly, in accordance with one aspect of the invention, a process for fabricating a metal-metal capacitor within an integrated circuit comprises the steps of: producing a first metal electrode, a second metal electrode, and a dielectric layer on top of a lower insulating layer; and depositing an upper insulating layer on top of the two metal electrodes and the dielectric layer. The integrated circuit comprises the lower insulating layer, a first metal layer which is on top of the lower insulating layer, and the upper insulating layer which is on top of the first metal layer. The capacitor comprises the first metal electrode, the second metal electrode, and the dielectric layer wherein each of the two metal electrodes is in contact with one side of the dielectric layer. Briefly, in accordance with another aspect of the invention, a computer readable medium for fabricating the metal-metal capacitor within the integrated circuit comprises program instructions for implementing each of the above steps.
Briefly, in accordance with another aspect of the invention, an integrated circuit comprises a lower insulating layer; a first metal layer which is on top of the lower insulating layer; an upper insulating layer which is on top of the first metal layer; and a metal-metal capacitor. The capacitor comprises a first metal electrode; a second metal electrode; and a dielectric layer. The first and second metal electrodes are placed one on each side of and in contact with the dielectric layer, and the first and second metal electrodes and the dielectric layer lie between the lower insulating layer and the upper insulating layer.